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SM320VC5421PGE20EP

商品名称： SM320VC5421PGE20EP

规格型号： SM320VC5421PGE20EP

库       存： 3284

交       期： 1-2周

商品单价： ￥806.619666[含税] 行情波动大，购买前请与客服确认

  • 起订量

    商品单价[含税]

  • 1

    ￥806.619666

  • 100

    ￥782.360089

  • 250

    ￥651.358374

  • 1000

    ￥606.481912

  • 商品分类：   数字信号处理器
  • 封　　装：LQFP (PGE)
  • 品　　牌：
  • 批　　号：两年内
  • 所在区域：大陆
好评率:100 %| 商品评分:100|
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  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –40°C to 85°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • 200-MIPS Dual-Core DSP Consisting of Two Independent Subsystems
  • Each Core Has an Advanced Multibus Architecture With Three Separate 16-Bit Data Memory Buses and One Program Bus
  • 40-Bit Arithmetic Logic Unit (ALU) Including a 40-Bit Barrel-Shifter and Two 40-Bit Accumulators Per Core
  • Each Core Has a 17-Bit × 17-Bit Parallel Multiplier Coupled to a 40-Bit Adder for Non-Pipelined Single-Cycle Multiply/Accumulate (MAC) Operations
  • Each Core Has a Compare, Select, and Store Unit (CSSU) for the Add/Compare Selection of the Viterbi Operator
  • Each Core Has an Exponent Encoder to Compute an Exponent Value of a 40-Bit Accumulator Value in a Single Cycle
  • Each Core Has Two Address Generators With Eight Auxiliary Registers and Two Auxiliary Register Arithmetic Units (ARAUs)
  • 16-Bit Data Bus With Data Bus Holder Feature
  • 512K-Word × 16-Bit Extended Program Address Space
  • Total of 256K-Word × 16-Bit Dual- and Single-Access On-Chip RAM (128K-Word x 16-Bit Two-Way Shared Memory)
  • Single-Instruction Repeat and Block-Repeat Operations
  • Instructions With 32-Bit-Long Word Operands
  • Instructions With Two or Three Operand Reads
  • Fast Return From Interrupts
  • Arithmetic Instructions With Parallel Store and Parallel Load
  • Conditional Store Instructions
  • Output Control of CLKOUT
  • Output Control of TOUT
  • Power Consumption Control With IDLE1, IDLE2, and IDLE3 Instructions
  • Dual 1.8-V (Core) and 3.3-V (I/O) Power Supplies for Low-Power, Fast Operations
  • 10-ns Single-Cycle Fixed-Point Instruction
  • Interprocessor Communication via Two Internal 8-Element FIFOs
  • Twelve Channels of Direct Memory Access (DMA) for Data Transfers With No CPU Loading (Six Channels Per Subsystem With External Access)
  • Six Multichannel Buffered Serial Ports (McBSPs) With 128-Channel Selection Capability (Three McBSPs per Subsystem)
  • 16-Bit Host-Port Interface (HPI) Multiplexed With External Memory Interface Pins
  • Software-Programmable Phase-Locked Loop (APLL) Provides Several Clocking Options (Requires External Oscillator)
  • On-Chip Scan-Based Emulation Logic, IEEE Standard 1149-1 (JTAG) Boundary-Scan Logic
  • Two Software-Programmable Timers (One Per Subsystem)
  • Software-Programmable Wait-State Generator (14 Wait States Maximum)
  • Provided in 144-pin Low-Profile Quad Flatpack (LQFP) (PGE Suffix) Package
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  • 商品分类

      数字信号处理器

  • 商品名称

    SM320VC5421PGE20EP

  • 规格型号

    SM320VC5421PGE20EP

  • 封　　装

    SM320VC5421PGE20EP

  • 品　　牌

  • 批　　号

    两年内

  • 交　　期

    1-2周

  • 所在区域

    大陆

    • 店铺其他商品

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